A Study of Viterbi Decoder Algorithm for Wireless LANs

Viterbi Decoders are commonly used to decode convolutional codes in communications systems. This Viterbi Decoder is a fully parallel implementation which gives fast data throughput. The decoder is targeted for WiMAX and Wireless LAN applications. Input symbol metric pairs are decoded into output data bits by the maximum likelihood Viterbi processor core. Decoder supports both hard and soft inputs. This decoder supports configurable traceback buffer size allowing performance to be fine tuned for different applications. Codes with symbol erasures (punctured code) can be decoded by this decoder. This decoder is written in VHDL, capable of being used on any FPGA/ASIC architecture. A Viterbi decoder uses the Viterbi algorithm for decoding a bitstream that has been encoded using a convolutional code. There are other algorithms for decoding a convolutionally encoded stream (for example, the Fano algorithm). The Viterbi algorithm is the most resource-consuming, but it does the maximum likelihood decoding. It is most often used for decoding convolutional codes with constraint lengths k<=10, but values up to k=15 are used in practice. This paper presents an overview of viterbi decoder and viterbi algorithm for wireless LANs.